From codesign-request@ifi.unizh.ch Tue Jul 4 14:48:53 1995 Return-Path: Received: from ifi.unizh.ch by josef.ifi.unizh.ch id <05967-0@josef.ifi.unizh.ch>; Tue, 4 Jul 1995 14:48:37 +0200 Subject: Mailing List NATO/ASI To: codesign@ifi.unizh.ch Date: Tue, 4 Jul 1995 14:48:35 +0200 (MET DST) X-Mailer: ELM [version 2.4 PL11] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Content-Length: 918 From: Markus Pilz Sender: pilz@ifi.unizh.ch Status: RO Hello everybody, today, when I received the complete list of all the participants of the NATO/ASI on Hardware/Software Co-design from Laura Caldirola, I could not resist to put a mailing list together. So, if you want do send greetings to all the participants or to discuss still open problems related to hardware / software co-design just mail to codesign@ifi.unizh.ch If you want to unsubscribe from the mailing list, send an e-mail to codesign-request@ifi.unizh.ch with the subject: unsubscribe. For to join the mailing list send an e-mail with subject: subscribe. Hope to see you all again in Tremezzo... Markus -- Markus Pilz e-mail: pilz@ifi.unizh.ch University of Zurich Voice: +41-1-257 43 05 Department of Computer Science Fax: +41-1-363 00 35 ---------------------------------------------------------------------- From codesign-request@ifi.unizh.ch Wed Jul 5 11:14:34 1995 Return-Path: Received: from ifi.unizh.ch by josef.ifi.unizh.ch id <02442-0@josef.ifi.unizh.ch>; Wed, 5 Jul 1995 11:14:00 +0200 Subject: You are subscribed To: codesign@ifi.unizh.ch Date: Wed, 5 Jul 1995 11:13:57 +0200 (MET DST) X-Mailer: ELM [version 2.4 PL11] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Content-Length: 679 From: Markus Pilz Sender: pilz@ifi.unizh.ch Status: RO Hello again, Sorry if my first mail was somewhat confusing. By default I subscribed all the participants to the mailing list and I intended the subscribe message for non-participants who would like to join the discussion. You only have to send me a message, if you don`t want to be on the list, but it was nice to get so many subscribe messages from all over the world :-). Bye Markus -- Markus Pilz e-mail: pilz@ifi.unizh.ch University of Zurich Voice: +41-1-257 43 05 Department of Computer Science Fax: +41-1-363 00 35 ---------------------------------------------------------------------- From codesign-request@ifi.unizh.ch Tue Jul 11 12:22:14 1995 Return-Path: Received: from ercole.cefriel.it by josef.ifi.unizh.ch with SMTP (PP) id <12256-0@josef.ifi.unizh.ch>; Tue, 11 Jul 1995 12:22:00 +0200 Received: from cns.cefriel.it ([131.175.5.7]) by mailer.cefriel.it (4.1/SMI-4.1) id AA23714; Tue, 11 Jul 95 12:11:08+010 Received: from CNS/MAILQUEUE by cns.cefriel.it (Mercury 1.21); 11 Jul 95 12:16:43 +0100 Received: from MAILQUEUE by CNS (Mercury 1.21); 11 Jul 95 12:16:30 +0100 From: William Fornaciari Organization: CEFRIEL, Milan, Italy To: codesign@ifi.unizh.ch Date: Tue, 11 Jul 1995 12:16:23 +0100 Subject: benchmarking Cc: CNS/FORNACIA@cns.cefriel.it X-Confirm-Reading-To: "William Fornaciari" X-Pmrqc: 1 Priority: normal X-Mailer: Pegasus Mail/Windows (v1.22) Message-Id: <15A692B77BD@cns.cefriel.it> Status: RO Dear Codesigners, I hope that "codesign@ifi.unizh.ch" will be more active than the "official" codesign mailing list (codes-all@eeel.nist.gov) established during a previous hw/sw codesign workshop in Boston. Apart from a huge amount of thanks to the maintainer for the big effort he is going to provide, I want to start a discussion concerning what I feel to be one of the crucial points in assessing the maturity of a investigation discipline: benchmarking. Yes, I agree with You that such a statement sounds like a new discovering of the "hot water" but something of effectively employable is still missing for our codesign purposes. I suggest to attack the problem by looking for some groups of system specs to be used as benchmarks. Due to the wide spectrum of possible alternatives, they might be partitioned according to: - Application areas: (e.g. control-dominated systems); - Size: these data can be related to existing fully hw or sw implementations, e.g.70000 gates ASIC or to some other characteristics to be defined; - Target architecture: e.g. multi-proc, single-proc,multi-chip, single chip, fpga, with/without OS...; - Real time requirements; - Level of user interactivity. etc., etc. In addition it would be useful to achieve a common agreement on what kind of result can be considered important in order to enable a consistent comparison among the solutions provided by the codesign system/flow under development by the various research groups. The goal of this mail is to understand if somebody is considering this problem relevant/addressable at this time and possibly to trigger a discussion and a growth of more precise proposals concerning the issues reported above. Sincerely William +--------------------------------------+ | Dr William Fornaciari | | CEFRIEL - EDA Area | | via Emanueli, 15 | | 20126 Milano - Italy | | Fax: +39-2-66100448 | | Phone: +39-2-66100083 | | E-mail: fornacia@mailer.cefriel.it | +--------------------------------------+ From codesign-request@ifi.unizh.ch Thu Jul 27 22:25:55 1995 Return-Path: Received: from polv2k.polito.it by josef.ifi.unizh.ch with SMTP (PP) id <15983-0@josef.ifi.unizh.ch>; Thu, 27 Jul 1995 22:25:44 +0200 Received: by polv2k.polito.it (5.57/Ultrix3.0-C) id AA10789; Thu, 27 Jul 95 22:26:28 +0200 Message-Id: <9507272026.AA10789@polv2k.polito.it> To: codesign@ifi.unizh.ch Subject: Re: benchmarking In-Reply-To: Your message of "Tue, 11 Jul 95 12:16:23 BST." <15A692B77BD@cns.cefriel.it> Date: Thu, 27 Jul 95 22:26:25 +0200 From: Luciano Lavagno Status: RO William Fornaciari writes: > - Application areas: (e.g. control-dominated systems); > - Size: these data can be related to existing fully hw or sw implementations, > e.g.70000 gates ASIC or to some other characteristics to be defined; > - Target architecture: e.g. multi-proc, single-proc,multi-chip, single chip, fpga, with/without OS...; > - Real time requirements; > - Level of user interactivity. > etc., etc. Specification language... this may in fact be the hardest problem. I still have to find two groups who agree on a common language (or language superset/subset :-) ). Does anybody have any idea (apart from mandating VHDL for all future codesign examples :-) ) on how to solve this problem ? Another problem (that we, for example, would have to face even if we found other groups interested in Esterel specifications) is that interesting examples may contain proprietory information > In addition it would be useful to achieve a common agreement on what kind of result can be > considered important in order to enable a consistent comparison among the solutions provided > by the codesign system/flow under development by the various research groups. I don't think that this is really essential. Authors focusing on similar problems can use the benchmarks to compare their results, even though there is no general consensus about a unified comparison mechanism. Ciao !!! Luciano -- Luciano Lavagno +39-11-564-4150 (fax 4099) lavagno@polito.it Dip. di Elettronica, Politecnico, C. Duca degli Abruzzi 24, 10129 Torino, ITALY From codesign-request@ifi.unizh.ch Thu Jul 27 22:52:12 1995 Return-Path: Received: from ee.Princeton.EDU by josef.ifi.unizh.ch with SMTP (PP) id <17238-0@josef.ifi.unizh.ch>; Thu, 27 Jul 1995 22:52:04 +0200 Received: (from wolf@localhost) by ee.Princeton.EDU (8.6.10/8.6.10-1) id QAA22271 for codesign@ifi.unizh.ch; Thu, 27 Jul 1995 16:51:52 -0400 Date: Thu, 27 Jul 1995 16:51:52 -0400 From: Wayne Wolf Message-Id: <199507272051.QAA22271@ee.Princeton.EDU> To: codesign@ifi.unizh.ch Subject: Re: benchmarking Status: RO I think that it may be possible to compare results within an application domain (automotive, printing, etc.). It is also possible to compare results for a well-defined problem which is useful in several domains (process scheduling, etc.). But I think that system-to-system comparisons will always be hard. We have a few example designs that were created by Princeton undergraduates. You can grab them from ee-ftp.princeton.edu in pub/Embedded/Examples. These aren't the ultimate design examples by any means, but they may be of some use to some people. From codesign-request@ifi.unizh.ch Wed Aug 2 17:02:46 1995 Return-Path: Received: from mailgate.ericsson.se by josef.ifi.unizh.ch with SMTP (PP) id <06287-0@josef.ifi.unizh.ch>; Wed, 2 Aug 1995 16:40:30 +0200 Received: from eua.ericsson.se (eua.ericsson.se [134.138.132.16]) by mailgate.ericsson.se (8.6.11/1.0) with SMTP id QAA24257 for ; Wed, 2 Aug 1995 16:39:56 +0200 Received: from ms.eua.ericsson.se by eua.ericsson.se (4.1/EUA-2.1) id AA12619; Wed, 2 Aug 95 16:39:54 +0200 Received: from euas64c14.eua.ericsson.se by ms.eua.ericsson.se (4.1/MS-2.1) id AA27372; Wed, 2 Aug 95 16:39:54 +0200 From: Fredrik.Ostman@eua.ericsson.se (Fredrik Ostman) Received: by euas64c14.eua.ericsson.se (4.1/client-1.3) id AA01502; Wed, 2 Aug 95 16:39:53 +0200 Date: Wed, 2 Aug 95 16:39:53 +0200 Message-Id: <9508021439.AA01502@euas64c14.eua.ericsson.se> To: codesign@ifi.unizh.ch Subject: Re: benchmarking Status: RO +-----< William Fornaciari > | > In addition it would be useful to achieve a common agreement on what kind of result can be | > considered important +- +-----< Luciano Lavagno > | I don't think that this is really essential. Authors focusing on similar | problems can use the benchmarks to compare their results, even though there is | no general consensus about a unified comparison mechanism. +- Still, an established benchmark will define the direction in which many people will strive, so if it is *useful* (or important as it were) it is all the better for all parties involved. I don't think it should, or has to, involve a certain language -- languages are probably what will be measured, to a certain extent. Heib and Daneva at der Universität des Saarlandes have defined twelve benchmarking dimensions: 1. Benchmarking focus 2. Benchmarking goal 3. Benchmarking network 4. Benchmarking object 5. Application context 6. Benchmarking phases 7. Organizational implementation 8. Information source 9. Benchmarking partnership 10. Cultural background 11. Decision level 12. Benchmark scope Although the values of many of these are probably given in our case, I think we should consider at least Benchmarking object: Are we measuring products, processes, functions, resources or strategies? Is co-design qualified by the way to get there or the product? Is the result measured in time, cost, life-cycle cost, business differentiation, market share? Luciano also mentioned something about Benchmark partnership/scope: can we compare internally, with direct competitors, or across branches? Maybe this is not a problem in "pure" academia, but with industrial partners involved it might be. These are some benchmarks I collected in Tremezzo (some of which are qualitative): * A laser printer circuit part of 6500 gates at 33 MHz was made 20% faster with HLS * A FIR filter of 80 k gates at 28 MHz sample rate was made 30% smaller in silicon area with HLS * One goal is to make a micro-processor in eighteen months. Today, it takes two to three years. Hitting the market window is crucial. Main requirements: The first silicon must be completely debuggable. The operating system must be ready between first and second silicon. The second silicon must be shippable. Nine to twelve months pass between first and second silicon. * Several example systems have been built using the Chinook system, for example a portable electronic phone book and a mobile defibrillator. * Fujitsu is reported to have dropped a GSM chip set in 1995 because it lacked sufficient flexibility for their customers' needs. * In an experiment, a multimedia set-top box was designed independently in parallel in synthesized hardware and microcoded software. The first iteration was three months in both versions. The second iteration was again three months for hardware but only one week for software. Not only the asip hardware, but also development tools were reused in the software project. * BNR designed a line card including a DSP and MCU asip pair in 1989. It then contained 200 000 sloc of Assembly code and was designed to handle six telecom applications. It was later used for over 100 different applications without hardware revision. Today, the line card is a single 0.5 mm chip with the same architecture. * a GSM base band asip chip with low power consumption due to a clocking frequency as low as 4 MHz. A general-purpose DSP would have had to use five to ten times higher clocking frequency and power consumption. ______ _~ (_/_ _ _ _/) _ . /) / ) , _/) _ __/ _/(_(/_(/__/(_/_/Z_ (_/_/)_/__/))_(I_/)_ Fredrik :Ostman Switching Networks Lab, Ellemtel Telecommunications Laboratories Box 1505/Armborstv:agen 14, S-125 25 :ALVSJ:O, Stockholm, Sweden +46 (8) 727 3348, fax +46 (8) 749 0594, Fredrik.Ostman@eua.ericsson.se From codesign-request@ifi.unizh.ch Mon Oct 2 17:14:36 1995 Return-Path: Received: from cheviot.ncl.ac.uk by josef.ifi.unizh.ch with SMTP (PP) id <04773-0@josef.ifi.unizh.ch>; Mon, 2 Oct 1995 17:13:17 +0100 Received: from by cheviot.ncl.ac.uk id (8.6.12/ for ncl.ac.uk) with SMTP; Mon, 2 Oct 1995 17:13:49 +0100 From: Sergio Vanderlei Cavalcante Message-Id: Subject: Symposium on ICs and Workshop on HW/SW Codesign To: codesign@ifi.unizh.ch Date: Mon, 2 Oct 95 17:18:09 BST X-Mailer: ELM [version 2.3 PL4] Status: RO ############################################################################### # # # IX Brazilian Symposium on Integrated Circuits # # # # March 24-27, 1996 # # Recife-PE, Brazil # # # # Call for Papers # ############################################################################### and ############################################################################### # I Workshop on Hardware/Software Codesign # # March 27-29 # # Recife-PE, Brazil # ############################################################################### The IX Brazilian Symposium on Integrated Circuits, supported by the Brazilian Society of Microelectronics (SBMICRO) and by the Brazilian Computing Society, will be held in Recife-PE, Brazil. Recife is a beautiful tropical city with nice beaches and a temperature around 29C throughout the year. The symposium will include sessions on technical papers, specialized talks, round-tables and short-courses to present the state-of-art in selected subjects. Papers presenting original work in all aspects of Integrated Circuits Design are sought. Topics of interest include (but are not limited to): - Computer Architecture (VLSI Design) - CAD tools for Design of Integrated Circuits - Hardware/Software Codesign - Integrated Circuits Prototyping - Integrated Circuits Application - CAD tools Demonstration Main activities: - Talks by invited speakers - Presentation of Technical papers - Short-courses - Round-tables - Demonstration of CAD tools Information for authors: - The manuscript should have no more than 12 pages including figures and references. It should be written in Portuguese or English. The paper should have the following format: - The pages should have A4 size (297X210)cm - Margins of 2.54cm. - The first page should include the authors of the paper, their complete address, telephone and/or fax numbers, e-mail and a 100-250 words abstract. - The manuscript should be sent in three copies to the Conference Chairman in the address indicated below. Important dates: - Deadline for submission of papers (postmarked): October 31, 1995 - Notification of Acceptance: January 15, 1996 - Camera-ready copy due: March 1, 1996. ############################################################################### # I workshop on Hardware/Software Codesign # # March 27-29 # # Recife-PE, Brazil # ############################################################################### This is the first Brazilian Workshop on Hardware/Software Codesign. The workshop will be held together with the IX SBCCI. This workshop aims to present relevant works on Hardware/Software Codesign with the participation of Brazilian and International Speakers. Main Activities: - Invited talks - Invited tutorials on Codesign - Presentation of Brazilian projects on H/S Codesign For further information about the IX SBCCI and the I Workshop on HW/SW Codesign please contact the organization of the event or send an e-mail to sbcci96@di.ufpe.br Organization: Symposium chairman: Dr.Edna Barros (IX SBCCI) Program Chairman: Dr. Manoel E de Lima (IX SBCCI) Workshop Chairman: Dr. Augusto Sampaio Departamento de Informatica Universidade Federal de Pernambuco Av.Prof. Luiz Freire, s/n Cidade Universitaria, Recife-PE Brazil CEP: 50740-540 P.O.Box 7851 Phone: +55 081 271 8430 Fax: +55 081 271 8438 Support: Department of Informatics - Federal University of Pernambuco (DI-UFPE) Brazilian Society of Microelectronics (SBMicro) Brazilian Computing Society (SBC) Brazilian National Research Council - Program for Cooperative Research in Computer Science (CNPq-PROTEM) -- email: s.v.cavalcante@newcastle.ac.uk Tel: +44 191 222 7340 Post : Department of Electrical and Fax: +44 191 222 8180 Electronic Engineering Merz Court University of Newcastle Newcastle upon Tyne NE1 7RU - England From pilz Mon Oct 16 10:50:44 1995 Subject: IEE Colloquium : Verification of hardware-software codesigns To: codesign@ifi.unizh.ch Date: Mon, 16 Oct 1995 10:50:44 +0100 (MET) X-Mailer: ELM [version 2.4 PL11] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Content-Length: 4364 Status: RO >From rwt@hplb.hpl.hp.com Mon Oct 16 10:45:04 MET 1995 Article: 8607 of comp.compilers Newsgroups: comp.compilers Path: ifinews!josef!scsing.switch.ch!swidir.switch.ch!in2p3.fr!univ-lyon1.fr!jussieu.fr!math.ohio-state.edu!uwm.edu!fnnews.fnal.gov!usenet.eel.ufl.edu!news.mathworks.com!news.kei.com!world!iecc!compilers-sender From: rwt@hplb.hpl.hp.com (richard taylor) Subject: IEE Colloquium : Verification of hardware-software codesigns Message-ID: <95-10-042@comp.compilers> Keywords: conference, architecture Sender: compilers-sender@chico.iecc.com Organization: Hewlett-Packard Laboratories, Bristol, England Date: Tue, 10 Oct 1995 07:26:19 GMT Approved: compilers@chico.iecc.com Lines: 93 IEE Colloquium. -------------- Verification and Validation of Hardware/Software Codesigns The second one day colloquium in the IEE "Hardware/Software Codesign" series, 'Verification of hardware-software codesigns' is being organised by PG C2 (Hardware and Systems Engineering) and PG C6 (Systems Engineering for Automation) at Savoy Place, London on Tuesday 17 October 1995. Codesign refers to the simultaneous process of designing both hardware and software to meet some specified performance objectives. Unlike more traditional approaches to system engineering where the hardware and software partitions are relatively rigid, codesigns are characterised by flexible partitions that may be shifted to meet changing performance criteria. One consequence of this is that sophisticated and flexible specification, synthesis, verification & validation tools become essential to the design process. The first colloquium in this series addressed current research and practice in the area of partitioning codesigns. The purpose of this colloquium is to examine the verification and validation processes essential for effective hardware-software codesign. Papers being presented at this colloquium address the requirements for verification and validation procedures, formal models for describing codesigns, and practical tools for their realisation. Speakers have been drawn from across Europe. The morning session will concentrate on models and formalisms for codesigns. After lunch, experimental toolsets for design exploration, validation and verification will be presented. The colloquium will conclude with a panel session addressing the practical problems of migrating laboratory tools and techniques to industrial applications. For further details and registration, please contact Claire Coleshill, IEE, Savoy Place, London, WC2R 0BL, United Kingdom. Phone (44) 171 344 5419, Fax (44) 171 497 3633, Email : ccoleshill@iee.org.uk *************** Program ********************** Chair : R Taylor, Hewlett-Packard Laboratories, Bristol, England. 10.00 - 10.30 Registration and Coffee 10.30 - 11.00 T Ismail and A Jerraya, TIMA/INPG Grenoble, France, ``Design Models and Steps for Codesign'' 11.00 - 11.30 R Nicholls, Manchester Metropolitan University, Manchester, ``Verification or Validation of Hardware/Software Codesigns ?'' 11.30 - 12.00 N Jayaramn, University of Westminster, London, ``Verification of Real Time Systems - Issues and Perspectives'' 12.00 - 12.30 J Staunstrup, Technical University of Denmark, Denmark, ``Interface Models in Hardware/Software Codesigns'' 12.40 - 1.30 Lunch 1.30 - 2.00 M Sheeran, Chalmers Technical University, Sweden , S Singh, Glasgow University, Scotland , ``Ruby as a Basis for Hardware/Software Codesign'' 2.00 - 2.30 W Luk and Peter Cheung, Imperial College of Science, Technology and Medicine, London, ``A Toolkit for Exploring Hardware/Software Systems'' 2.30 - 3.00 W Rosentiel, University of T'ubingen and Forshungszentrum Informatik, Germany, ``Source Level Emulation to Bridge the Gap Between High Level Synthesis and Emulation'' 3.00 - 3.30 G Evans and D Morris, UMIST, Manchester, ``Validation and Verification of System Designs using MOOSE'' 3,30 - 3.45 Coffee 3.45 - 4.45 Panel Discussion ``Transferring Laboratory Techniques to Industry, Requirements, Aspirations and Practicality'', Chair : J Harrison, Hewlett-Packard Limited 4.45 Close -- Richard Taylor, Hewlett-Packard Laboratories, Bristol, UK. rwt@hplb.hpl.hp.com phone : +44 (0) 117 922 9545 fax : +44 (0) 117 922 8925 -- Send compilers articles to compilers@iecc.com, meta-mail to compilers-request@iecc.com. From codesign-request@ifi.unizh.ch Mon Oct 16 10:51:17 1995 Return-Path: Received: from ifi.unizh.ch by josef.ifi.unizh.ch id <01671-0@josef.ifi.unizh.ch>; Mon, 16 Oct 1995 10:50:46 +0100 Subject: IEE Colloquium : Verification of hardware-software codesigns To: codesign@ifi.unizh.ch Date: Mon, 16 Oct 1995 10:50:44 +0100 (MET) X-Mailer: ELM [version 2.4 PL11] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Content-Length: 4362 From: Markus Pilz Sender: pilz@ifi.unizh.ch Status: RO >From rwt@hplb.hpl.hp.com Mon Oct 16 10:45:04 MET 1995 Article: 8607 of comp.compilers Newsgroups: comp.compilers Path: ifinews!josef!scsing.switch.ch!swidir.switch.ch!in2p3.fr!univ-lyon1.fr!jussieu.fr!math.ohio-state.edu!uwm.edu!fnnews.fnal.gov!usenet.eel.ufl.edu!news.mathworks.com!news.kei.com!world!iecc!compilers-sender From: rwt@hplb.hpl.hp.com (richard taylor) Subject: IEE Colloquium : Verification of hardware-software codesigns Message-ID: <95-10-042@comp.compilers> Keywords: conference, architecture Sender: compilers-sender@chico.iecc.com Organization: Hewlett-Packard Laboratories, Bristol, England Date: Tue, 10 Oct 1995 07:26:19 GMT Approved: compilers@chico.iecc.com Lines: 93 IEE Colloquium. -------------- Verification and Validation of Hardware/Software Codesigns The second one day colloquium in the IEE "Hardware/Software Codesign" series, 'Verification of hardware-software codesigns' is being organised by PG C2 (Hardware and Systems Engineering) and PG C6 (Systems Engineering for Automation) at Savoy Place, London on Tuesday 17 October 1995. Codesign refers to the simultaneous process of designing both hardware and software to meet some specified performance objectives. Unlike more traditional approaches to system engineering where the hardware and software partitions are relatively rigid, codesigns are characterised by flexible partitions that may be shifted to meet changing performance criteria. One consequence of this is that sophisticated and flexible specification, synthesis, verification & validation tools become essential to the design process. The first colloquium in this series addressed current research and practice in the area of partitioning codesigns. The purpose of this colloquium is to examine the verification and validation processes essential for effective hardware-software codesign. Papers being presented at this colloquium address the requirements for verification and validation procedures, formal models for describing codesigns, and practical tools for their realisation. Speakers have been drawn from across Europe. The morning session will concentrate on models and formalisms for codesigns. After lunch, experimental toolsets for design exploration, validation and verification will be presented. The colloquium will conclude with a panel session addressing the practical problems of migrating laboratory tools and techniques to industrial applications. For further details and registration, please contact Claire Coleshill, IEE, Savoy Place, London, WC2R 0BL, United Kingdom. Phone (44) 171 344 5419, Fax (44) 171 497 3633, Email : ccoleshill@iee.org.uk *************** Program ********************** Chair : R Taylor, Hewlett-Packard Laboratories, Bristol, England. 10.00 - 10.30 Registration and Coffee 10.30 - 11.00 T Ismail and A Jerraya, TIMA/INPG Grenoble, France, ``Design Models and Steps for Codesign'' 11.00 - 11.30 R Nicholls, Manchester Metropolitan University, Manchester, ``Verification or Validation of Hardware/Software Codesigns ?'' 11.30 - 12.00 N Jayaramn, University of Westminster, London, ``Verification of Real Time Systems - Issues and Perspectives'' 12.00 - 12.30 J Staunstrup, Technical University of Denmark, Denmark, ``Interface Models in Hardware/Software Codesigns'' 12.40 - 1.30 Lunch 1.30 - 2.00 M Sheeran, Chalmers Technical University, Sweden , S Singh, Glasgow University, Scotland , ``Ruby as a Basis for Hardware/Software Codesign'' 2.00 - 2.30 W Luk and Peter Cheung, Imperial College of Science, Technology and Medicine, London, ``A Toolkit for Exploring Hardware/Software Systems'' 2.30 - 3.00 W Rosentiel, University of T'ubingen and Forshungszentrum Informatik, Germany, ``Source Level Emulation to Bridge the Gap Between High Level Synthesis and Emulation'' 3.00 - 3.30 G Evans and D Morris, UMIST, Manchester, ``Validation and Verification of System Designs using MOOSE'' 3,30 - 3.45 Coffee 3.45 - 4.45 Panel Discussion ``Transferring Laboratory Techniques to Industry, Requirements, Aspirations and Practicality'', Chair : J Harrison, Hewlett-Packard Limited 4.45 Close -- Richard Taylor, Hewlett-Packard Laboratories, Bristol, UK. rwt@hplb.hpl.hp.com phone : +44 (0) 117 922 9545 fax : +44 (0) 117 922 8925 -- Send compilers articles to compilers@iecc.com, meta-mail to compilers-request@iecc.com. From codesign-request@ifi.unizh.ch Fri Oct 20 12:35:34 1995 Return-Path: Received: from hplb.hpl.hp.com by josef.ifi.unizh.ch with SMTP (PP) id <17780-0@josef.ifi.unizh.ch>; Fri, 20 Oct 1995 12:35:16 +0100 Received: from rtaylor.hpl.hp.com by hplb.hpl.hp.com; Fri, 20 Oct 1995 12:35:04 +0100 Received: by rtaylor.hpl.hp.com (1.37.109.16/15.6+ISC) id AA124448904; Fri, 20 Oct 1995 12:35:04 +0100 From: "Dr. Richard Taylor" Message-Id: <9510201235.ZM12442@rtaylor.hpl.hp.com> Date: Fri, 20 Oct 1995 12:35:03 +0100 X-Mailer: Z-Mail (3.2.0 06sep94) To: codesign@ifi.unizh.ch Subject: Call for papers Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Status: RO ***Call for papers*** IEE Colloquium Hardware-software cosynthesis for reconfigurable systems February 22, 1996. System architectures that incorporate field programmable hardware as well as ``conventional'' ASIC and microprocessor parts are becoming increasingly popular. Systems such as these promise improved time to market, painless field-upgrades, and through dynamically reprogrammable hardware, applications that optimise their own hardware at runtime. This colloquium, the third in the IEE Hardware-software codesign series, is to address the challenge of synthesising such systems. Papers are invited on all aspects of synthesising reliable and maintainable reconfigurable systems. Papers that address toolkits for cosynthesis, and illustrate methodologies through case studies will be particularly welcome. The colloquium will be held at Hewlett-Packard Research Laboratories, Bristol, England. The deadline for submission of extended abstracts is December 8, 1995. Papers are welcomed from both academic and industrial authors, and it is expected that there will be a roughly 50-50 split at the colloquium. The proceedings will be published by the IEE. For further details please contact Richard Taylor, Hewlett-Packard Laboratories, Flton Road, Bristol BS12 6QZ, UK. Phone (44) 117 922 9545, Email rwt@hpl.hp.com. or Claire Coleshill, IEE, Savoy Place, London, WC2R 0BL, United Kingdom. Phone (44) 171 344 5419, Fax (44) 171 497 3633, Email : ccoleshill@iee.org.uk From codesign-request@ifi.unizh.ch Sat Oct 28 12:24:11 1995 Return-Path: Received: from conch.vast.unsw.edu.au by josef.ifi.unizh.ch with SMTP (PP) id <20733-0@josef.ifi.unizh.ch>; Sat, 28 Oct 1995 12:09:01 +0100 Received: from nautilus (nautilus.vast.unsw.edu.au) by conch.vast.unsw.edu.au with SMTP id AA10567 (5.65c/IDA-1.4.4 for ); Sat, 28 Oct 1995 21:08:38 +1000 From: Graham Hellestrand Received: by nautilus (5.0/client-1.3) id AA05244; Sat, 28 Oct 1995 21:08:34 +1000 Date: Sat, 28 Oct 1995 21:08:34 +1000 Message-Id: <9510281108.AA05244@nautilus> To: codesign@ifi.unizh.ch Subject: positions working in codesign in oz X-Sun-Charset: US-ASCII Content-Length: 5458 Status: RO Dear Codesign Colleagues, As you may remember we are working on a unified codesign system for mixed technologies (hardware, software, mechanical, optical). This is a project with major support from the Australian Governement and being undertaken with the involvement of 3 companies. We have a couple of positions available within my Laboratory on the CoDesign project at present - one job and one PhD Scholarship. The job would suite a person with expertise in the areas indicated and we would welcome applications from recent postgraduate degree completers who have substantial programming experience and a codesign 'orientation'. The following formal advertisements tell a more coherent story. Clearly, the usual immigration rules would need to be complied with but we can facilitate these aspects of the Australian bureaucractic machine at the appropriate time. I will be attending ICCAD so if there are interested people who wish to find out more perhaps you could email me at: g.hellestrand@unsw.edu Both advertisements have a closing date of 13 November 1995 which is immediately after ICCAD. I wonder whether I might ask recipients of this mail to forward it to likely people and/or place it on an appropriate noticeboard. Many thanks for your assistance Cheers, graham hellestrand PS: Ahhh fond memories of the 2 week boondoggle on Lake Como and the 0000-0230 drinking bouts at the Helvetia. Only joking, it was a serious 2 weeks of solid work! ============================================================= PROFESSIONAL OFFICER SCHOOL OF COMPUTER SCIENCE AND ENGINEERING University of New South Wales, Sydney, Australia --------------------------------------------------------------------- Salary: Level 7 A$37,978 -- A$42,300 per annum Level of appointment and commencement salary are dependent on qualifications and experience. --------------------------------------------------------------------- The School of Computer Science and Engineering is seeking to employ a Professional Officer for a project funded by an Australian Government Generic Industrial Research and Development Grant and three participating companies. This project, based in the School's VLSI and Systems Technology Laboratory, aims to specify, model, and synthesise systems incorporating both hardware and software. Duties will involve the following aspects of the project: investigation as directed, developing software generators for synthesising hardware and software systems, verifying generators and hardware/software interface, assisting in the preparation of reports, and taking part in discussions and research seminars. The successful applicant should have completed or have been working towards a postgraduate degree in Computer Science or Computer Engineering with at least two years of software engineering and programming experience. Knowledge of functional languages and experience in interfacing hardware and software are essential. Good communication skills, and ability to work with a project team operating under tight schedules is also required. Experience in hardware design, as well as C/C++ programming on an MS Windows platform are desired. The appointment is for an initial period until end of 1997, with a further renewal to mid 1998 being possible. Enquiries may be directed to Professor Graham Hellestrand on telephone +61-2-385-4028, facsimite +61-2-385-5514, email: G.Hellestrand@unsw.edu.au; Dr Ricky Chan on telephone +61-2-385-4056, email: ricky@vast.unsw.edu.au. Written applications, incorporating a full curriculum vitae, references, and cover letter must be received by 13 November 1995 at the following email address: G.Hellestrand@unsw.edu.au ============================================================= POSTGRADUATE SCHOLARSHIP SCHOOL OF COMPUTER SCIENCE AND ENGINEERING University of New South Wales, Sydney, Australia (Ref. Number: PG426) --------------------------------------------------------------------- The VaST Lab. in the School of Computer Science and Engineering, UNSW is offering a PhD scholarship as soon as possible in 1995. The annual stipend is up to $18,500 depending on qualification. The scholarship is renewable for a period of 3 years and is funded from a grant from the Australian Research Council. The scholarship supports research in the area of hardware software codesign for a duration up to 3 years. This project aims at synthesesing, interpreting, and verifying software and hardware sytstems from a unified functional specification notation. The successful applicant must have completed a degree in Computer Science or Computer Engineering with outstanding results. The research will be carried out under the supervision of Professor G. R. Hellestrand in the School of Computer Science and Engineering. Enquiries may be directed to Professor Graham Hellestrand on telephone +61-2-385-4028, facsimite +61-2-385-5514, email: G.Hellestrand@unsw.edu.au. Written applications, incorporating a full cv and a cover letter letter mentioning the reference number must be received by 13 November 1995 forwarded to: Professor G. R. Hellestrand, School of Computer Science and Engineering, The University of New South Wales Sydney, NSW 2052, Australia. ============================================================= ============================================================= From @uklirb.informatik.uni-kl.de:abakus@informatik.uni-kl.de Tue Nov 14 05:41:56 1995 Return-Path: <@uklirb.informatik.uni-kl.de:abakus@informatik.uni-kl.de> Received: from stepsun.uni-kl.de by josef.ifi.unizh.ch with SMTP (PP) id <15675-0@josef.ifi.unizh.ch>; Tue, 14 Nov 1995 05:41:53 +0100 Received: from uklirb.informatik.uni-kl.de by stepsun.uni-kl.de id rk09681; 13 Nov 95 18:47 MET Received: from irz1.informatik.uni-kl.de by uklirb.informatik.uni-kl.de id aa02344; 13 Nov 95 15:45 MET Received: by irz1.informatik.uni-kl.de (5.x/SMI-SVR4) id AA03897; Mon, 13 Nov 1995 15:45:10 +0100 From: AG Hartenstein-UNI KL-FRG Message-Id: <9511131445.AA03897@irz1.informatik.uni-kl.de> Subject: FPL'96 Call for Papers To: pilz@ifi.unizh.ch Date: Mon, 13 Nov 1995 15:45:10 +0100 (MET) X-Mailer: ELM [version 2.4 PL24] Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Status: RO _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| _| _| _|_|_|_| _|_|_|_| _| _| _|_|_|_| _|_|_|_| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_|_| _|_|_|_| _| _|_|_|_| _|_|_|_| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_|_|_| _|_|_|_| _|_|_|_| _| _| _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| F P L '96 S I X T H I N T E R N A T I O N A L W O R K S H O P FIELD PROGRAMMABLE LOGIC AND APPLICATIONS _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| September 23 - 25, 1996 (Monday - Wednesday) _| _| _| _| Darmstadt, Germany _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| C A L L F O R P A P E R S A N D P A R T I C I P A N T S _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| Paper Deadline March 6, 1996 _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| PLEASE DISTRIBUTE THIS CALL TO ALL INTERESTED COLLEAGUES AND PEOPLE ACCORDING TO YOUR MAILING LIST, THANKS IN ADVANCE! AIM The aim of this workshop is to bring together workers from throughout the world for a wide ranging discussion of all forms of field programmable logic (but particularly field programmable gate arrays) and their applications. It is intended to discuss the increasing range of device types, industrial applications, advanced CAD developments, research applications, novel systems architectures and educational experiences. The workshop will include regular presentations, posters and discussion sessions and it is expected that most of the delegates will wish to make some contribution to one or more of these. The workshop is to be considered as continuation of four already heldSE international workshops in Oxford (1991 and 1993), Vienna (1992) and Prague (1994). CALL FOR CONTRIBUTIONS Contributions are invited for regular presentation, poster and discussion sessions. Prospective authors are invited to submit an abstract of at least 500 words or a full paper by 6 March 1996 to the Program Chairman. Please preface this by your full correspondence address, including e-mail, and fax, a list of (at most) 5 one-line statements that best encapsulate the essence of your proposed contribution, and a note of your preferred presentation format. Please mail 10 copies if possible, but submissions by e-mail (abakus@informatik.uni-kl.de) or fax (+49 631 205-2640) will also be accepted. NOTIFICATION OF ACCEPTANCE will be posted by 8 May 1996 and final papers must be received by 3 July 1996 to guarantee distribution at the workshop. Accepted papers will be published in book form by Springer before the workshop. Potential exhibitors and tutorial presenters are also invited to contact the Program Chairman. The official conference language as well as the language of submissions and accepted papers will be English. SCOPE Field Programmable Logic has been available for a number of years, but the increasing power and variety of devices now available is extending its role from that of simply being a convenient way of implementing the system glue logic to an increasing ability to implement mainstream system functions. The speed with which devices can be programmed makes them ideal for prototyping and education, the reprogrammable devices are opening up sophisticated new applications and hardware/software trade-offs. CAD is developed for automatic compilation of advanced designs and routes to custom circuits are now available. WORKSHOP TOPICS: The topics should cover, but are not restricted to: - New and future commercial devices - Novel chip architectures - New software and hardware development tools - Bridges to other CAD and to custom circuits - High-level design and compilation research - Industrial applications and experiences - Trade-offs betweendevices, architectures and technologies; Benchmark comparisons - Smartapplications - Custom computers - Hardware/Software Co-Designusing FPL - Novel machine paradigms and system architectures - ASIC emulators, hardware modellers and compiled accelerators - Fault models, testability methods, reliability - Educationalexperiences and opportunities GENERAL CHAIRMAN: Prof. Manfred Glesner Darmstadt University of Technology Karlstrasse 15 D-64283 Darmstadt Germany Phone: +49 6151 16-5136 Fax: +49 6151 16-4936 email: glesner@microelectronic.e-technik.th-darmstadt.de PROGRAM CHAIRMAN: Prof. Reiner W. Hartenstein University of Kaiserslautern P. O. Box 3049 D-67653 Kaiserslautern Germany Phone: +49 631 205-2606 Fax: +49 631 205-2640 email: hartenst@rhrk.uni-kl.de PROGRAM COMMITTEE: Jeffrey Arnold, IDA CCS, USA Peter Athanas, Virginia Tech, USA Gaetano Borriello, U. of Washington, USA Stephen Brown, U. of Toronto, CA Klaus Buchenrieder, Siemens AG, FRG Bernard Courtois, INPG, Grenoble, France Keith Dimond, U. of Kent, UK Patrick Foulk, Heriot-Watt U., UK Norbert Fristacky, Slovak Technical U., SK Manfred Glesner, TH Darmstadt, FRG Daniel Gajski, UC Irvine, USA John Gray, Xilinx, UK Herbert Gruenbacher, Vienna U., Austria Reiner Hartenstein, U. of Kaiserslautern, FRG Udo Kebschull, U. of Tuebingen, FRG Andres Keevallik, Tallinn Technical U., Estonia Chong-Min Kyung, KAIST-Inst. of Techn., South Korea Wayne Luk, Imperial College, UK Patrick Lysaght, U. of Strathclyde, Scotland Will Moore, Oxford U., UK Klaus Mueller-Glaser, U. Karlsruhe, FRG Wolfgang Nebel, U. of Oldenburg, FRG Peter Noakes, U. of Essex, UK Franco Pirri, U. of Firenze, Italy Jonathan Rose, U. of Toronto, Canada Zoran Salcic, U. of Auckland, New Zealand Mariagiovanna Sami, Politechnico di Milano, Italy Alberto Sangiovanni-Vincentelli, UC Berkeley, USA Michal Servit, Czech T. U., Czech Republic Mike Smith, U. of Hawaii, USA Steve Trimberger, Xilinx, USA LOCAL DETAILS The workshop will be held at the Orangerie in Darmstadt, on 23rd - 25th September 1996. The Orangerie is an attractive old palace, which contains rooms for congresses. A bus ticket for reaching the Orangerie during the workshop is included in the registration fee. Darmstadt, which is situated in the Rhein-Main-Area nearby Frankfurt, Wiesbaden, Mainz and Heidelberg, has numerous cultural and tourist attractions as well as plenty to interest accompanying partners. There are fast connections to Frankfurt International Airport. All the latest information about FPL'96 can be accessed via a WWW-page. The URL for this document is: http://www.microelectronic.e-technik.th-darmstadt.de/fpl96/fpl96.html REPLY FORM FOR REGISTRATION FORM We encourage you to reply via e-mail, giving us the information listed below. If you do not have the possibility to use e-mail, please copy the form below and send or fax it in advance to the General Chairman. -------------------- FPL `96 - REGISTRATION FORM -------------------- Name: ......................................................... (Family Name) (First and Middle) Affiliation:......................................................... Address: ......................................................... ......................................................... Country: ......................................................... Phone: ......................................................... Fax: ......................................................... E-mail: ......................................................... Registration fees *) _ | | Normal fee DM 490 - Includes attendance to all sessions, social program, banquet, workshop proceedings and bus ticket. _ | | Student fee DM 250 - Includes attendance to all sessions and bus ticket. _ | | Spouse / Partner fee DM 200 - Includes social program, banquet and bus ticket. TOTAL AMOUNT: DM .... Payment should be made in advance, in DM. Please select method of payment: _ | | Transfer to our bank account - Darmstaedter Volksbank e. G. (BLZ: 50890000) Account No.: 1218611 (recipient: Prof. Manfred Glesner) Please specify: "FPL'96 & delegate name" _ | | Cheques (+30 DM banking fees necessary!) - Cheque in DM made payable to Prof. Manfred Glesner Please specify: "FPL'96 & delegate name" _ | | Credit Card: (check one) - _ _ | | VISA | | EUROCARD / MASTERCARD - - CREDIT CARD ONLY: Credit card number:.................................................. Name of holder: .................................................. Expiration date: .................................................. Signature of holder:................................................. *) IMPORTANT: Any bank charges must be paid by the sender.The amount arriving at our bank must not be less than the registration fee. Please take care that any banking fees are settled. Date and Signature:.................................................. ---------------------------- End of form ---------------------------- ----------------- FPL `96 - Hotel Reservation Form ------------------ *** DEADLINE: August 23rd, 1996 *** Name: ......................................................... (Family Name) (First and Middle) Affiliation:......................................................... Address: ......................................................... ......................................................... Country: ......................................................... Phone: ......................................................... Fax: ......................................................... TYPE OF ROOM: _ | | single room - _ | | single room - _ | | single room - PREFERED CATEGORY: _ | | category I about DM 210 - _ | | category II about DM 130 - _ | | category III about DM 90 - Prices are per person and night. (You will be informed about single / double room conditions) Check in date: ...................................................... Check out date:...................................................... Arrival time: ...................................................... _ _ Arrival by: | | train | | car - - ..................... ......................................... (Date) (Stamp and Signature) ---------------------------- End of form ---------------------------- Please send or fax Hotel Reservation Form in advance (until August 23rd 1996) to: Magistrat der Stadt Darmstadt Verkehrsamt z.Hd. Frau Neubauer Luisenplatz 5 D-64283 Darmstadt Germany Hotel accomodation is merely found for you. Therefore, we do not take any responsibility. Verkehrsamt der Stadt Darmstadt Tourist-Information am Hauptbahnhof Tel.: (+49) 6151 - 13 27 82 Fax: (+49) 6151 - 13 27 83 From pilz Tue Nov 14 09:39:24 1995 Subject: FPL'96 Call for Papers To: codesign@ifi.unizh.ch Date: Tue, 14 Nov 1995 09:39:24 +0100 (MET) X-Mailer: ELM [version 2.4 PL11] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Content-Length: 12222 Status: RO _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| _| _| _|_|_|_| _|_|_|_| _| _| _|_|_|_| _|_|_|_| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_|_| _|_|_|_| _| _|_|_|_| _|_|_|_| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_|_|_| _|_|_|_| _|_|_|_| _| _| _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| F P L '96 S I X T H I N T E R N A T I O N A L W O R K S H O P FIELD PROGRAMMABLE LOGIC AND APPLICATIONS _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| September 23 - 25, 1996 (Monday - Wednesday) _| _| _| _| Darmstadt, Germany _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| C A L L F O R P A P E R S A N D P A R T I C I P A N T S _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| Paper Deadline March 6, 1996 _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| PLEASE DISTRIBUTE THIS CALL TO ALL INTERESTED COLLEAGUES AND PEOPLE, THANKS IN ADVANCE! AIM The aim of this workshop is to bring together workers from throughout the world for a wide ranging discussion of all forms of field programmable logic (but particularly field programmable gate arrays) and their applications. It is intended to discuss the increasing range of device types, industrial applications, advanced CAD developments, research applications, novel systems architectures and educational experiences. The workshop will include regular presentations, posters and discussion sessions and it is expected that most of the delegates will wish to make some contribution to one or more of these. The workshop is to be considered as continuation of four already heldSE international workshops in Oxford (1991 and 1993), Vienna (1992) and Prague (1994). CALL FOR CONTRIBUTIONS Contributions are invited for regular presentation, poster and discussion sessions. Prospective authors are invited to submit an abstract of at least 500 words or a full paper by 6 March 1996 to the Program Chairman. Please preface this by your full correspondence address, including e-mail, and fax, a list of (at most) 5 one-line statements that best encapsulate the essence of your proposed contribution, and a note of your preferred presentation format. Please mail 10 copies if possible, but submissions by e-mail (abakus@informatik.uni-kl.de) or fax (+49 631 205-2640) will also be accepted. NOTIFICATION OF ACCEPTANCE will be posted by 8 May 1996 and final papers must be received by 3 July 1996 to guarantee distribution at the workshop. Accepted papers will be published in book form by Springer before the workshop. Potential exhibitors and tutorial presenters are also invited to contact the Program Chairman. The official conference language as well as the language of submissions and accepted papers will be English. SCOPE Field Programmable Logic has been available for a number of years, but the increasing power and variety of devices now available is extending its role from that of simply being a convenient way of implementing the system glue logic to an increasing ability to implement mainstream system functions. The speed with which devices can be programmed makes them ideal for prototyping and education, the reprogrammable devices are opening up sophisticated new applications and hardware/software trade-offs. CAD is developed for automatic compilation of advanced designs and routes to custom circuits are now available. WORKSHOP TOPICS: The topics should cover, but are not restricted to: - New and future commercial devices - Novel chip architectures - New software and hardware development tools - Bridges to other CAD and to custom circuits - High-level design and compilation research - Industrial applications and experiences - Trade-offs betweendevices, architectures and technologies; Benchmark comparisons - Smartapplications - Custom computers - Hardware/Software Co-Designusing FPL - Novel machine paradigms and system architectures - ASIC emulators, hardware modellers and compiled accelerators - Fault models, testability methods, reliability - Educationalexperiences and opportunities GENERAL CHAIRMAN: Prof. Manfred Glesner Darmstadt University of Technology Karlstrasse 15 D-64283 Darmstadt Germany Phone: +49 6151 16-5136 Fax: +49 6151 16-4936 email: glesner@microelectronic.e-technik.th-darmstadt.de PROGRAM CHAIRMAN: Prof. Reiner W. Hartenstein University of Kaiserslautern P. O. Box 3049 D-67653 Kaiserslautern Germany Phone: +49 631 205-2606 Fax: +49 631 205-2640 email: hartenst@rhrk.uni-kl.de PROGRAM COMMITTEE: Jeffrey Arnold, IDA CCS, USA Peter Athanas, Virginia Tech, USA Gaetano Borriello, U. of Washington, USA Stephen Brown, U. of Toronto, CA Klaus Buchenrieder, Siemens AG, FRG Bernard Courtois, INPG, Grenoble, France Keith Dimond, U. of Kent, UK Patrick Foulk, Heriot-Watt U., UK Norbert Fristacky, Slovak Technical U., SK Manfred Glesner, TH Darmstadt, FRG Daniel Gajski, UC Irvine, USA John Gray, Xilinx, UK Herbert Gruenbacher, Vienna U., Austria Reiner Hartenstein, U. of Kaiserslautern, FRG Udo Kebschull, U. of Tuebingen, FRG Andres Keevallik, Tallinn Technical U., Estonia Chong-Min Kyung, KAIST-Inst. of Techn., South Korea Wayne Luk, Imperial College, UK Patrick Lysaght, U. of Strathclyde, Scotland Will Moore, Oxford U., UK Klaus Mueller-Glaser, U. Karlsruhe, FRG Wolfgang Nebel, U. of Oldenburg, FRG Peter Noakes, U. of Essex, UK Franco Pirri, U. of Firenze, Italy Jonathan Rose, U. of Toronto, Canada Zoran Salcic, U. of Auckland, New Zealand Mariagiovanna Sami, Politechnico di Milano, Italy Alberto Sangiovanni-Vincentelli, UC Berkeley, USA Michal Servit, Czech T. U., Czech Republic Mike Smith, U. of Hawaii, USA Steve Trimberger, Xilinx, USA LOCAL DETAILS The workshop will be held at the Orangerie in Darmstadt, on 23rd - 25th September 1996. The Orangerie is an attractive old palace, which contains rooms for congresses. A bus ticket for reaching the Orangerie during the workshop is included in the registration fee. Darmstadt, which is situated in the Rhein-Main-Area nearby Frankfurt, Wiesbaden, Mainz and Heidelberg, has numerous cultural and tourist attractions as well as plenty to interest accompanying partners. There are fast connections to Frankfurt International Airport. All the latest information about FPL'96 can be accessed via a WWW-page. The URL for this document is: http://www.microelectronic.e-technik.th-darmstadt.de/fpl96/fpl96.html REPLY FORM FOR REGISTRATION FORM We encourage you to reply via e-mail, giving us the information listed below. If you do not have the possibility to use e-mail, please copy the form below and send or fax it in advance to the General Chairman. -------------------- FPL `96 - REGISTRATION FORM -------------------- Name: ......................................................... (Family Name) (First and Middle) Affiliation:......................................................... Address: ......................................................... ......................................................... Country: ......................................................... Phone: ......................................................... Fax: ......................................................... E-mail: ......................................................... Registration fees *) _ | | Normal fee DM 490 - Includes attendance to all sessions, social program, banquet, workshop proceedings and bus ticket. _ | | Student fee DM 250 - Includes attendance to all sessions and bus ticket. _ | | Spouse / Partner fee DM 200 - Includes social program, banquet and bus ticket. TOTAL AMOUNT: DM .... Payment should be made in advance, in DM. Please select method of payment: _ | | Transfer to our bank account - Darmstaedter Volksbank e. G. (BLZ: 50890000) Account No.: 1218611 (recipient: Prof. Manfred Glesner) Please specify: "FPL'96 & delegate name" _ | | Cheques (+30 DM banking fees necessary!) - Cheque in DM made payable to Prof. Manfred Glesner Please specify: "FPL'96 & delegate name" _ | | Credit Card: (check one) - _ _ | | VISA | | EUROCARD / MASTERCARD - - CREDIT CARD ONLY: Credit card number:.................................................. Name of holder: .................................................. Expiration date: .................................................. Signature of holder:................................................. *) IMPORTANT: Any bank charges must be paid by the sender.The amount arriving at our bank must not be less than the registration fee. Please take care that any banking fees are settled. Date and Signature:.................................................. ---------------------------- End of form ---------------------------- ----------------- FPL `96 - Hotel Reservation Form ------------------ *** DEADLINE: August 23rd, 1996 *** Name: ......................................................... (Family Name) (First and Middle) Affiliation:......................................................... Address: ......................................................... ......................................................... Country: ......................................................... Phone: ......................................................... Fax: ......................................................... TYPE OF ROOM: _ | | single room - _ | | single room - _ | | single room - PREFERED CATEGORY: _ | | category I about DM 210 - _ | | category II about DM 130 - _ | | category III about DM 90 - Prices are per person and night. (You will be informed about single / double room conditions) Check in date: ...................................................... Check out date:...................................................... Arrival time: ...................................................... _ _ Arrival by: | | train | | car - - ..................... ......................................... (Date) (Stamp and Signature) ---------------------------- End of form ---------------------------- Please send or fax Hotel Reservation Form in advance (until August 23rd 1996) to: Magistrat der Stadt Darmstadt Verkehrsamt z.Hd. Frau Neubauer Luisenplatz 5 D-64283 Darmstadt Germany Hotel accomodation is merely found for you. Therefore, we do not take any responsibility. Verkehrsamt der Stadt Darmstadt Tourist-Information am Hauptbahnhof Tel.: (+49) 6151 - 13 27 82 Fax: (+49) 6151 - 13 27 83 From codesign-request@ifi.unizh.ch Tue Nov 14 09:39:36 1995 Return-Path: Received: from ifi.unizh.ch by josef.ifi.unizh.ch id <00912-0@josef.ifi.unizh.ch>; Tue, 14 Nov 1995 09:39:25 +0100 Subject: FPL'96 Call for Papers To: codesign@ifi.unizh.ch Date: Tue, 14 Nov 1995 09:39:24 +0100 (MET) X-Mailer: ELM [version 2.4 PL11] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Content-Length: 12221 From: Markus Pilz Sender: pilz@ifi.unizh.ch Status: RO _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| _| _| _|_|_|_| _|_|_|_| _| _| _|_|_|_| _|_|_|_| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_|_| _|_|_|_| _| _|_|_|_| _|_|_|_| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _| _|_|_|_| _|_|_|_| _|_|_|_| _| _| _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| F P L '96 S I X T H I N T E R N A T I O N A L W O R K S H O P FIELD PROGRAMMABLE LOGIC AND APPLICATIONS _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| September 23 - 25, 1996 (Monday - Wednesday) _| _| _| _| Darmstadt, Germany _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| C A L L F O R P A P E R S A N D P A R T I C I P A N T S _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| _| _| _| Paper Deadline March 6, 1996 _| _| _| _|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_| PLEASE DISTRIBUTE THIS CALL TO ALL INTERESTED COLLEAGUES AND PEOPLE, THANKS IN ADVANCE! AIM The aim of this workshop is to bring together workers from throughout the world for a wide ranging discussion of all forms of field programmable logic (but particularly field programmable gate arrays) and their applications. It is intended to discuss the increasing range of device types, industrial applications, advanced CAD developments, research applications, novel systems architectures and educational experiences. The workshop will include regular presentations, posters and discussion sessions and it is expected that most of the delegates will wish to make some contribution to one or more of these. The workshop is to be considered as continuation of four already heldSE international workshops in Oxford (1991 and 1993), Vienna (1992) and Prague (1994). CALL FOR CONTRIBUTIONS Contributions are invited for regular presentation, poster and discussion sessions. Prospective authors are invited to submit an abstract of at least 500 words or a full paper by 6 March 1996 to the Program Chairman. Please preface this by your full correspondence address, including e-mail, and fax, a list of (at most) 5 one-line statements that best encapsulate the essence of your proposed contribution, and a note of your preferred presentation format. Please mail 10 copies if possible, but submissions by e-mail (abakus@informatik.uni-kl.de) or fax (+49 631 205-2640) will also be accepted. NOTIFICATION OF ACCEPTANCE will be posted by 8 May 1996 and final papers must be received by 3 July 1996 to guarantee distribution at the workshop. Accepted papers will be published in book form by Springer before the workshop. Potential exhibitors and tutorial presenters are also invited to contact the Program Chairman. The official conference language as well as the language of submissions and accepted papers will be English. SCOPE Field Programmable Logic has been available for a number of years, but the increasing power and variety of devices now available is extending its role from that of simply being a convenient way of implementing the system glue logic to an increasing ability to implement mainstream system functions. The speed with which devices can be programmed makes them ideal for prototyping and education, the reprogrammable devices are opening up sophisticated new applications and hardware/software trade-offs. CAD is developed for automatic compilation of advanced designs and routes to custom circuits are now available. WORKSHOP TOPICS: The topics should cover, but are not restricted to: - New and future commercial devices - Novel chip architectures - New software and hardware development tools - Bridges to other CAD and to custom circuits - High-level design and compilation research - Industrial applications and experiences - Trade-offs betweendevices, architectures and technologies; Benchmark comparisons - Smartapplications - Custom computers - Hardware/Software Co-Designusing FPL - Novel machine paradigms and system architectures - ASIC emulators, hardware modellers and compiled accelerators - Fault models, testability methods, reliability - Educationalexperiences and opportunities GENERAL CHAIRMAN: Prof. Manfred Glesner Darmstadt University of Technology Karlstrasse 15 D-64283 Darmstadt Germany Phone: +49 6151 16-5136 Fax: +49 6151 16-4936 email: glesner@microelectronic.e-technik.th-darmstadt.de PROGRAM CHAIRMAN: Prof. Reiner W. Hartenstein University of Kaiserslautern P. O. Box 3049 D-67653 Kaiserslautern Germany Phone: +49 631 205-2606 Fax: +49 631 205-2640 email: hartenst@rhrk.uni-kl.de PROGRAM COMMITTEE: Jeffrey Arnold, IDA CCS, USA Peter Athanas, Virginia Tech, USA Gaetano Borriello, U. of Washington, USA Stephen Brown, U. of Toronto, CA Klaus Buchenrieder, Siemens AG, FRG Bernard Courtois, INPG, Grenoble, France Keith Dimond, U. of Kent, UK Patrick Foulk, Heriot-Watt U., UK Norbert Fristacky, Slovak Technical U., SK Manfred Glesner, TH Darmstadt, FRG Daniel Gajski, UC Irvine, USA John Gray, Xilinx, UK Herbert Gruenbacher, Vienna U., Austria Reiner Hartenstein, U. of Kaiserslautern, FRG Udo Kebschull, U. of Tuebingen, FRG Andres Keevallik, Tallinn Technical U., Estonia Chong-Min Kyung, KAIST-Inst. of Techn., South Korea Wayne Luk, Imperial College, UK Patrick Lysaght, U. of Strathclyde, Scotland Will Moore, Oxford U., UK Klaus Mueller-Glaser, U. Karlsruhe, FRG Wolfgang Nebel, U. of Oldenburg, FRG Peter Noakes, U. of Essex, UK Franco Pirri, U. of Firenze, Italy Jonathan Rose, U. of Toronto, Canada Zoran Salcic, U. of Auckland, New Zealand Mariagiovanna Sami, Politechnico di Milano, Italy Alberto Sangiovanni-Vincentelli, UC Berkeley, USA Michal Servit, Czech T. U., Czech Republic Mike Smith, U. of Hawaii, USA Steve Trimberger, Xilinx, USA LOCAL DETAILS The workshop will be held at the Orangerie in Darmstadt, on 23rd - 25th September 1996. The Orangerie is an attractive old palace, which contains rooms for congresses. A bus ticket for reaching the Orangerie during the workshop is included in the registration fee. Darmstadt, which is situated in the Rhein-Main-Area nearby Frankfurt, Wiesbaden, Mainz and Heidelberg, has numerous cultural and tourist attractions as well as plenty to interest accompanying partners. There are fast connections to Frankfurt International Airport. All the latest information about FPL'96 can be accessed via a WWW-page. The URL for this document is: http://www.microelectronic.e-technik.th-darmstadt.de/fpl96/fpl96.html REPLY FORM FOR REGISTRATION FORM We encourage you to reply via e-mail, giving us the information listed below. If you do not have the possibility to use e-mail, please copy the form below and send or fax it in advance to the General Chairman. -------------------- FPL `96 - REGISTRATION FORM -------------------- Name: ......................................................... (Family Name) (First and Middle) Affiliation:......................................................... Address: ......................................................... ......................................................... Country: ......................................................... Phone: ......................................................... Fax: ......................................................... E-mail: ......................................................... Registration fees *) _ | | Normal fee DM 490 - Includes attendance to all sessions, social program, banquet, workshop proceedings and bus ticket. _ | | Student fee DM 250 - Includes attendance to all sessions and bus ticket. _ | | Spouse / Partner fee DM 200 - Includes social program, banquet and bus ticket. TOTAL AMOUNT: DM .... Payment should be made in advance, in DM. Please select method of payment: _ | | Transfer to our bank account - Darmstaedter Volksbank e. G. (BLZ: 50890000) Account No.: 1218611 (recipient: Prof. Manfred Glesner) Please specify: "FPL'96 & delegate name" _ | | Cheques (+30 DM banking fees necessary!) - Cheque in DM made payable to Prof. Manfred Glesner Please specify: "FPL'96 & delegate name" _ | | Credit Card: (check one) - _ _ | | VISA | | EUROCARD / MASTERCARD - - CREDIT CARD ONLY: Credit card number:.................................................. Name of holder: .................................................. Expiration date: .................................................. Signature of holder:................................................. *) IMPORTANT: Any bank charges must be paid by the sender.The amount arriving at our bank must not be less than the registration fee. Please take care that any banking fees are settled. Date and Signature:.................................................. ---------------------------- End of form ---------------------------- ----------------- FPL `96 - Hotel Reservation Form ------------------ *** DEADLINE: August 23rd, 1996 *** Name: ......................................................... (Family Name) (First and Middle) Affiliation:......................................................... Address: ......................................................... ......................................................... Country: ......................................................... Phone: ......................................................... Fax: ......................................................... TYPE OF ROOM: _ | | single room - _ | | single room - _ | | single room - PREFERED CATEGORY: _ | | category I about DM 210 - _ | | category II about DM 130 - _ | | category III about DM 90 - Prices are per person and night. (You will be informed about single / double room conditions) Check in date: ...................................................... Check out date:...................................................... Arrival time: ...................................................... _ _ Arrival by: | | train | | car - - ..................... ......................................... (Date) (Stamp and Signature) ---------------------------- End of form ---------------------------- Please send or fax Hotel Reservation Form in advance (until August 23rd 1996) to: Magistrat der Stadt Darmstadt Verkehrsamt z.Hd. Frau Neubauer Luisenplatz 5 D-64283 Darmstadt Germany Hotel accomodation is merely found for you. Therefore, we do not take any responsibility. Verkehrsamt der Stadt Darmstadt Tourist-Information am Hauptbahnhof Tel.: (+49) 6151 - 13 27 82 Fax: (+49) 6151 - 13 27 83 From codesign-request@ifi.unizh.ch Fri Dec 1 14:54:16 1995 Return-Path: Received: from sssup2.sssup.it by josef.ifi.unizh.ch with SMTP (PP) id <05507-0@josef.ifi.unizh.ch>; Fri, 1 Dec 1995 14:54:07 +0100 Received: by sssup2.sssup.it; (5.65v3.2/1.1.8.2/02Nov95-1158PM) id AA20620; Fri, 1 Dec 1995 14:53:44 +0100 Date: Fri, 1 Dec 1995 14:53:44 +0100 From: Gaetano Borriello Message-Id: <9512011353.AA20620@sssup2.sssup.it> To: codesign@ifi.unizh.ch Subject: Co-design course info? Status: RO I would be most appreciative if anyone who has taught or attended a course on hardware/software co-design and/or embedded system design would forward me the course outline and reading list. I am organizing such a course and would like to see what others have done in terms of allocation of time to the many different possible sub-topics. Thanks. Gaetano Borriello From codesign-request@ifi.unizh.ch Fri Dec 1 18:25:11 1995 Return-Path: Received: from gupta.cs.uiuc.edu by josef.ifi.unizh.ch with SMTP (PP) id <13619-0@josef.ifi.unizh.ch>; Fri, 1 Dec 1995 18:24:57 +0100 Received: (from rgupta@localhost) by gupta.cs.uiuc.edu (8.7.1/8.7.1) id KAA10412; Fri, 1 Dec 1995 10:37:59 -0600 (CST) From: Rajesh Gupta Message-Id: <199512011637.KAA10412@gupta.cs.uiuc.edu> Subject: Re: Co-design course info? To: gaetano@sssup2.sssup.it (Gaetano Borriello) Date: Fri, 1 Dec 1995 10:37:58 -0600 (CST) Cc: codesign@ifi.unizh.ch In-Reply-To: <9512011353.AA20620@sssup2.sssup.it> from "Gaetano Borriello" at Dec 1, 95 02:53:44 pm X-Mailer: ELM [version 2.4 PL23] Content-Type: text Status: RO You may want to look through http://gupta.cs.uiuc.edu/~rgupta/cs497.html for topic suggestions. I am enclosing an outline below. Please let me know if you need more information. Regards, Rajesh -- http://gupta.cs.uiuc.edu/~rgupta 217 244-6025 encl: Architecture and Synthesis of Embedded Systems ---------------------------------------------- Introduction Electronic and Micro-electronic systems Role of reprogrammable components in system design A genealogy of problems in embedded system design. System representation and modeling Levels of abstraction in system design. Introduction to principles of modeling concurrent reactive systems Languages for Hardware-Software system modeling Comparative review of popular hardware and software prototyping languages such as VHDL, Esterel, Lotos, Lustre, CSML Abstract models: finite state and extended models BDD/MTBDD/ADD/EVBDD Constraints and Constraint modeling System analysis Implicit representation and analysis techniques Modeling and analysis of interface Interface optimization and synthesis Constraint feasibility analysis Compilation and behavioral optimizations Hardware and software specific transformations Co-design and co-synthesis System design problems and their reduction to fundamental combinatoric problems. System partitioning and co-design techniques. Co-synthesis under constraints Hardware synthesis. Software and runtime system generation. Performance estimation for hardware-software systems. Role of symbolic optimization and constrained encoding techniques as links to high-level synthesis. Simulation Simulation as a modeling activity Simulation as a verification activity Recent developments in mixed-domain simulations. From codesign-request@ifi.unizh.ch Sat Dec 2 01:47:01 1995 Return-Path: Received: from bips.EECS.Berkeley.EDU by josef.ifi.unizh.ch with SMTP (PP) id <06047-0@josef.ifi.unizh.ch>; Sat, 2 Dec 1995 01:45:09 +0100 Received: (from vhanx@localhost) by bips.EECS.Berkeley.EDU (8.6.11/8.6.9) id QAA06162; Fri, 1 Dec 1995 16:44:42 -0800 Date: Fri, 1 Dec 1995 16:44:42 -0800 Message-Id: <199512020044.QAA06162@bips.EECS.Berkeley.EDU> From: Reinhard Von Hanxleden To: codesign@ifi.unizh.ch Subject: [brayton@EECS.Berkeley.EDU: Intl. Symposium on System Synthesis: Call for Papers (fwd) - FYI] Status: RO ------- Start of forwarded message ------- From: "Robert K. Brayton" Subject: Intl. Symposium on System Synthesis: Call for Papers (fwd) - FYI To: cadgroup@ic.EECS.Berkeley.EDU Date: Fri, 1 Dec 1995 16:41:21 -0800 (PST) X-Mailer: ELM [version 2.4 PL23] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Content-Length: 5510 Forwarded message: >From narayan@cs.UCR.edu Fri Dec 1 14:13:44 1995 Date: Fri, 1 Dec 1995 14:15:38 -0800 (PST) From: sanjiv narayan Message-Id: <199512012215.OAA04197@corsa.ucr.edu> To: brayton@eecs.berkeley.edu Subject: Intl. Symposium on System Synthesis: Call for Papers ----------------------------------------------- 9TH INTERNATIONAL SYMPOSIUM ON SYSTEM SYNTHESIS ----------------------------------------------- La Jolla, California, November 6-8, 1996 CALL FOR PAPERS ----------------------------------------------- ISSS'96 is oriented towards design automation professionals and presents the latest results in emerging system design and synthesis technologies. Original technical papers on, but not limited to, the following topics are invited: 1. System-level synthesis: Architectures; partitioning; transformations; design reuse; quality measures and estimation; specification languages; intermediate forms; system testbench development. 2. Hardware-software co-design: Hardware/software tradeoffs; interfaces and communication; co-simulation, co-emulation and co-synthesis; prototyping; embedded system architectures. 3. Programmable processor-based design and synthesis: Code generation; instruction-set specification, design and simulation; high-level code transformations. 4. High-level synthesis: Datapath, control, memory, and interface synthesis from behavioral specifications; clocking/timing optimization; physical design models for high-level tradeoffs; hardware accelerators/coprocessors. 5. Design experience and methodologies: Application-specific parallel/distributed systems; industrial telecom, robotics, vision, video, audio and speech processing systems; design methodology; process management. 6. Synthesis for low power, testability and verifiability. 7. Embedded and real-time software: Software development; constraint specification; process scheduling; real-time operating systems; distributed systems. Submitted papers should be 12 pages or less, clearly specifying contributions and results, and including a cover page with the following: paper title; complete name, address, telephone, fax, and email address of each author; identification of the corresponding author; and the category (numbered 1-7 above) most closely matching the paper's content. The Symposium proceedings will be published by the IEEE Computer Society Press. To encourage exchange of preliminary work, authors of an accepted paper may withhold formal publication; however, submissions simultaneously sent to other forums will not be considered. 8 copies of the paper should be sent along with the cover page to the Program Chair at the following address (alternatively, the paper and cover page may be submitted electronically as uuencoded Postscript files to the given email address): Frank Vahid, ISSS'96 Tel: (909) 787-4710 Computer Science Dept. Fax: (909) 787-4643 University of California Email: vahid@cs.ucr.edu Riverside, CA 92521-0304, U.S.A. Author's schedule ----------------- Submissions deadline: April 15, 1996 Notification of acceptance: June 15, 1996 Camera-ready copies: August 1, 1996 Steering committee ------------------- General Chair: Ahmed Jerraya, INPG-CNRS-UJF/TIMA Program Chair: Frank Vahid, UC Riverside Publicity/Publications Chair: Sanjiv Narayan, Viewlogic Finance Chair: Loganath Ramachandran, LSI Logic Exhibits Chair: Yu-Chin Hsu, UC Riverside Panels Chair: Daniel Gajski, UC Irvine Past Chair: Pierre Paulin, SGS-Thomson Technical Program Committee --------------------------- Raul Camposano, Synopsys Francky Cathoor, IMEC Nikil Dutt, UC Irvine Rolf Ernst, Tech. Univ. Braunschweig Cathy Gebotys, Univ. Waterloo Gert Goossens, IMEC Kayhan Kucukcakar, Motorola Fadi Kurdahi, UC Irvine Steve YL Lin, Tsing Hua Univ. Paul Lippens, Philips Jan Madsen, Tech. Univ. Denmark Lev Markov, Mentor Graphics Peter Marwedel, Univ. Dortmund Vijay Nagasamy, LSI Logic Yukihiro Nakamura, NTT Kevin O'Brien, Leda Jeanne Pitz, TI Wolfgang Rosenstiel, Univ. Tubingen, FZI Mani Srivastava, AT&T Leon Stok, IBM Donald Thomas, CMU Kazutoshi Wakabayashi, NEC Robert Walker, RPI Wayne Wolf, Princeton Check the WWW at http://cs.ucr.edu/isss96/ for ISSS'96 related information. Send email to ISSS-request@ics.uci.edu to join the ISSS email list. La Jolla is 20 minutes north of San Diego International Airport. ------------------------------------------------------------------------------- Sponsored by the IEEE Computer Society DATC and the ACM SIGDA. ------------------------------------------------------------------------------- * Kindly forward this Announcement to your colleagues. For duplications and * * requests for removal from this list, send mail to * ------- End of forwarded message ------- From codesign-request@ifi.unizh.ch Mon Dec 4 10:07:11 1995 Return-Path: Received: from ipmel2.elet.polimi.it by josef.ifi.unizh.ch with SMTP (PP) id <19165-0@josef.ifi.unizh.ch>; Mon, 4 Dec 1995 10:05:19 +0100 Received: by ipmel2.elet.polimi.it (5.65/DEC-Ultrix/4.3A) id AA07748; Mon, 4 Dec 1995 10:02:57 +0100 Message-Id: <9512040902.AA07748@ipmel2.elet.polimi.it> X-Sender: sami@elet.polimi.it Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Date: Mon, 04 Dec 1995 10:06:03 +0100 To: rgupta@cd.uiuc.edu From: sami@elet.polimi.it (Mariagiovanna Sami) Subject: system design course Cc: codesign@ifi.unizh.ch X-Mailer: Status: RO Dear Rajesh, I find your course outline quite interesting - I present most of these items in my course on system design (where I have to deal with a lot of other digital design problems as well, from testing to high-level synthesis, since they are not treated in other courses!). I find Statecharts and related state-based solutions (e.g. Speed) for specification modeling quite useful; the fact that my students are tuned to FSM modeling comes in handy, of course. The big trouble with the course is that there is no book available (Italian students love books!) and I have to distribute copies of my foils, suggested readings etc. By the way, can you provide us with the suggested reading list you give to your students? Thank you! Best regards Mariagiovanna Mariagiovanna Sami Dipartimento di Elettronica e Informazione, Politecnico di Milano ph. (+39)(2)2399-3516 fax (+39)(2)2399-3411 e-mail: sami@elet.polimi.it From codesign-request@ifi.unizh.ch Mon Dec 4 18:30:44 1995 Return-Path: Received: from chronos.synopsys.com by josef.ifi.unizh.ch with SMTP (PP) id <08461-0@josef.ifi.unizh.ch>; Mon, 4 Dec 1995 18:30:33 +0100 Received: from atropos.synopsys.com by chronos.synopsys.com with SMTP id AA21763 (5.65c/IDA-1.4.4 for ); Mon, 4 Dec 1995 09:30:06 -0800 Received: from clotho.synopsys.com (clotho.synopsys.com [146.225.100.24]) by atropos.synopsys.com (8.6.9/8.6.9) with ESMTP id JAA16108 for ; Mon, 4 Dec 1995 09:30:04 -0800 Received: from raul-pc (raul-pc.synopsys.com [146.225.116.111]) by clotho.synopsys.com (8.6.9/8.6.9) with SMTP id JAA21119 for ; Mon, 4 Dec 1995 09:29:58 -0800 Date: Mon, 4 Dec 1995 09:29:58 -0800 Message-Id: <199512041729.JAA21119@clotho.synopsys.com> X-Sender: raul@macpo-1 X-Mailer: Windows Eudora Pro Version 2.1.2 Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" To: codesign@ifi.unizh.ch From: Raul Camposano Subject: Re: Co-design course info? Status: RO Hello, could you please stop replying to the whole group in your discussion about course notes and just respond to Serge Leef - otherwise everyone gets this. Thanks! --Raul At 09:11 AM 12/4/95 PST, you wrote: >This email is in response to your email to Serge Leef regarding exisiting >material for HW/SW Co-design courses. I have a tutorial taught at ICCAD-95 by >Jorg Henkel (Tech. Univ.), Frank Vahid (UC - Riverside) and L. Ramacahndran >(LSI Logic). The course was not very interesting (primarily because of the >presentation style of the talkers), but it provided some good reference >material. I have the hard-copy and the electronic copy may still be around. You >need to ftp to "ftp.ucr.edu" and get the file >"pub/publications/misc/iccad95_tutorial". > >If you need any help, let me know. > >Regards, >Nish Parikh > > ______________________________________________________________________ Raul Camposano Director, Design Environment R&D Synopsys Inc. Phone: +1 (415) 694-1769 700 East Middlefield Road Fax: +1 (415) 694-4128 Mountain View, CA 94043-4033 email: raul@synopsys.com USA From codesign-request@ifi.unizh.ch Mon Dec 4 18:37:25 1995 Return-Path: Received: from newsgw.mentorg.com by josef.ifi.unizh.ch with SMTP (PP) id <07921-0@josef.ifi.unizh.ch>; Mon, 4 Dec 1995 18:11:52 +0100 Received: from wv.wv.mentorg.com by newsgw.mentorg.com (8.6.4/CF5.22R) id MAA21161; Mon, 4 Dec 1995 12:10:51 -0500 Received: from em-wv03.wv.mentorg.com by wv.wv.mentorg.com (8.6.8.1/CF5.22R) id JAA15510; Mon, 4 Dec 1995 09:11:14 -0800 Received: from holein1.MENTORG.COM by em-wv03.wv.mentorg.com (8.6.8.1/CF5.23H) id JAA04201; Mon, 4 Dec 1995 09:12:10 -0800 From: nish_parikh@MENTORG.COM (Nish Parikh) Received: by holein1.MENTORG.COM (4.1/CF3.4) id AA02279; Mon, 4 Dec 95 09:11:12 PST Date: Mon, 4 Dec 95 09:11:12 PST Message-Id: <9512040911.ZM2277@holein1> X-Mailer: Z-Mail (3.0.0 15dec93) To: codesign@ifi.unizh.ch Subject: Co-design course info? Cc: serge_leef@MENTORG.COM Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 Status: RO This email is in response to your email to Serge Leef regarding exisiting material for HW/SW Co-design courses. I have a tutorial taught at ICCAD-95 by Jorg Henkel (Tech. Univ.), Frank Vahid (UC - Riverside) and L. Ramacahndran (LSI Logic). The course was not very interesting (primarily because of the presentation style of the talkers), but it provided some good reference material. I have the hard-copy and the electronic copy may still be around. You need to ftp to "ftp.ucr.edu" and get the file "pub/publications/misc/iccad95_tutorial". If you need any help, let me know. Regards, Nish Parikh From codesign-request@ifi.unizh.ch Tue Dec 5 13:59:53 1995 Return-Path: Received: from mailgate.ericsson.se by josef.ifi.unizh.ch with SMTP (PP) id <21527-0@josef.ifi.unizh.ch>; Tue, 5 Dec 1995 13:59:41 +0100 Received: from eua.ericsson.se (eua.ericsson.se [134.138.132.16]) by mailgate.ericsson.se (8.6.11/1.0) with SMTP id NAA07825 for ; Tue, 5 Dec 1995 13:58:15 +0100 Received: from ms.eua.ericsson.se by eua.ericsson.se (4.1/EUA-2.1) id AA11139; Tue, 5 Dec 95 13:58:14 +0100 Received: from euax9i1c33.eua.ericsson.se by ms.eua.ericsson.se (4.1/MS-2.1) id AA14206; Tue, 5 Dec 95 13:58:13 +0100 From: Fredrik.Ostman@eua.ericsson.se (Fredrik Ostman) Received: by euax9i1c33.eua.ericsson.se (5.x/client-1.3) id AA05128; Tue, 5 Dec 1995 13:58:12 +0100 Date: Tue, 5 Dec 1995 13:58:12 +0100 Message-Id: <9512051258.AA05128@euax9i1c33.eua.ericsson.se> To: codesign@ifi.unizh.ch Subject: Re: Co-design course info? X-Sun-Charset: US-ASCII Status: RO Codesigners, I do believe that the discussion about courses is well within the scope of the list. Please keep up the discussion. It amazes me how low the interest is in the codesign community to discuss the issues (on this list at least, I thought it had died altogether). Internet discussions are quite active in other professional fields such as systems design and management methodology, where the stakes are at least as high. Why not on this list? Maybe the list manager ought to clarify just what the charter of the list is? I realize maybe I've misunderstood it, in which case I beg your pardon for "SPAMMING". Markus? ______ _~ (_/_ _ _ _/) _ . /) / ) , _/) _ __/ _/(_(/_(/__/(_/_/Z_ (_/_/)_/__/))_(I_/)_ Fredrik :Ostman Switch Lab, Ericsson Telecommunication Systems Laboratories Box 1505/Armborstv:agen 14, S-125 25 :ALVSJ:O, Stockholm, Sweden +46 (8) 727 3348, fax +46 (8) 749 0594, Fredrik.Ostman@eua.ericsson.se From pilz Tue Dec 5 18:42:51 1995 Subject: Topics of the co-design mailing list To: codesign@ifi.unizh.ch Date: Tue, 5 Dec 1995 18:42:51 +0100 (MET) X-Mailer: ELM [version 2.4 PL11] MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Content-Length: 1206 Status: RO Hello everybody, My intentions when creating the hardware/software-codesign mailing list was just to found a platform where the participants of the NATO-ASI can continue discussions started at Como. Clearly, the topics should be related to hardware/software codesign (and I think a course on co-design is), but the decision what to discuss and what to dis tribute is up to all of you. Actually, given the low frequency of mails and the quality of the contributions so far, I do no filtering. Be aware that every mail sent to codesign@ifi.unizh.ch is immediately forwarded to everybody on the list. I can do some filtering if you ask me for, but up to now I would have passed over every posting. You are free to replay directly to the sender, to take discussions off-line and for mails concerning the list administration you can contact me under codesign-request@ifi.unizh.ch. Hope to see a lot of interesting postings. Regards, Markus Pilz -- email: pilz@ifi.unizh.ch Markus Pilz, University of Zurich voice: +41-1-257 43 05 Department of Computer Science fax: +41-1-363 00 35 Winterthurerstr. 190, CH-8057 Zurich www: http://www.ifi.unizh.ch/staff/pilz.html From codesign-request@ifi.unizh.ch Wed Dec 6 09:33:53 1995 Return-Path: Received: from stepsun.uni-kl.de by josef.ifi.unizh.ch with SMTP (PP) id <04952-0@josef.ifi.unizh.ch>; Wed, 6 Dec 1995 08:58:54 +0100 Received: from sun.rhrk.uni-kl.de by stepsun.uni-kl.de id aa13478; 6 Dec 95 8:58 MET Received: from aix6.rhrk.uni-kl.de by sun.rhrk.uni-kl.de id aa23563; 6 Dec 95 8:57 MET Received: from [131.246.76.156] by aix6 with smtp (Smail3.1.28.1 #7) id m0tNEk5-0000YhC; Wed, 6 Dec 95 08:58 CET Message-Id: Date: Wed, 6 Dec 95 08:58 CET From: Reiner Hartenstein Reply-To: Reiner Hartenstein To: codesign@ifi.unizh.ch Cc: hartenst@rhrk.uni-kl.de Subject: Co-design course info? Status: RO Subject: Co-design course info? Just like Gaetano also I would be most appreciative if anyone who has taught or attended a course on hardware/software co-design and/or embedded system design would forward me the course outline and reading list. I am planning such a course and would like to see what others have done in terms of allocation of time to the many different possible sub-topics. Another question: does anybody know about efforts to convert undergraduate introductory CS courses or exercises from purely procedural foundations to a dual introduction showing procedural and structural programming as alternatives to implement the same algorithm. By the way, this is a revolutionary issue. I remember a panel "Is obsolete what we are teaching?" at this years ACM annual conference (only traditional algorithms & programming professors on the stage). With my codesign idea contribution from the floor I crashed into a concrete wall - flat on my face. The title of the panel has been just kidding - to attract people. Did anybody of you have similar experiences? Please, tell us! regards Reiner Hartenstein _________________________________________________________________ Prof. Dr.-Ing. Reiner W. Hartenstein, Universitaet Kaiserslautern Informatik (CSEE Dept.) phone: +49 (631) 205 2606 Erwin-Schroedinger-Strasse, Bau 12 fax: +49 (631) 205 2640 D-67663 Kaiserslautern, Germany email: hartenst@rhrk.uni-kl.de home: R. Hartenstein, Postfach 1744, D-76607 Bruchsal, Germany Fax: (07251) 14823, Fax international: +49 (7251) 14823 _/ _/ _/_/_/ _/ _/ _/_/_/ _/_/_/ _/_/_/ _/_/ _/ _/_/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/_/_/ _/ _/_/_/ _/ _/ _/ _/_/_/ _/_/_/ _/_/ _/_/_/_/_/ _/_/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/_/ _/ _/_/_/ _/ _/ _/_/ _/ From codesign-request@ifi.unizh.ch Wed Dec 6 10:21:39 1995 Return-Path: Received: from iddth.id.dtu.dk by josef.ifi.unizh.ch with SMTP (PP) id <06857-0@josef.ifi.unizh.ch>; Wed, 6 Dec 1995 10:21:33 +0100 Received: from cirdan.id.dtu.dk (cirdan.id.dtu.dk [130.225.76.90]) by iddth.id.dtu.dk (8.6.9/8.6.4) with SMTP id KAA01602; Wed, 6 Dec 1995 10:20:45 +0100 Received: by cirdan.id.dtu.dk (4.1/SMI-4.1) id AA04139; Wed, 6 Dec 95 10:47:18 +0100 Date: Wed, 6 Dec 95 10:47:18 +0100 From: jan@cirdan.id.dtu.dk (Jan Madsen) Message-Id: <9512060947.AA04139@cirdan.id.dtu.dk> To: gaetano@sssup2.sssup.it Cc: codesign@ifi.unizh.ch In-Reply-To: <9512011353.AA20620@sssup2.sssup.it> (message from Gaetano Borriello on Fri, 1 Dec 1995 14:53:44 +0100) Subject: Re: Co-design course info? Status: RO This summer Jorgen Staunstrup and I organized a summer school on hardware/software codesign at the Technical University of Denmark. The course was organized in the framework of EUROCHIP advanced training courses and sponsored by IFIP WG 10.5. Detailed information about the course may still be obtained through www at: http://www.id.dtu.dk/~jst/sum95/announce.html Greetings, Jan Madsen -- --------------------------------------------------------------------------- Jan Madsen, Assistant Professor, Ph.D. PHONE: +45 45 25 37 51 Dept. of Computer Science FAX: +45 45 88 45 30 Technical University of Denmark EMAIL: jan@id.dtu.dk DK-2800 Lyngby, Denmark --------------------------------------------------------------------------- From codesign-request@ifi.unizh.ch Wed Dec 6 10:21:08 1995 Return-Path: Received: from mailgate.ericsson.se by josef.ifi.unizh.ch with SMTP (PP) id <06831-0@josef.ifi.unizh.ch>; Wed, 6 Dec 1995 10:20:54 +0100 Received: from eua.ericsson.se (eua.ericsson.se [134.138.132.16]) by mailgate.ericsson.se (8.6.11/1.0) with SMTP id KAA29052 for ; Wed, 6 Dec 1995 10:20:20 +0100 Received: from ms.eua.ericsson.se by eua.ericsson.se (4.1/EUA-2.1) id AA29201; Wed, 6 Dec 95 10:20:17 +0100 Received: from euax9i1c33.eua.ericsson.se by ms.eua.ericsson.se (4.1/MS-2.1) id AA29636; Wed, 6 Dec 95 10:20:16 +0100 From: Fredrik.Ostman@eua.ericsson.se (Fredrik Ostman) Received: by euax9i1c33.eua.ericsson.se (5.x/client-1.3) id AA11966; Wed, 6 Dec 1995 10:20:15 +0100 Date: Wed, 6 Dec 1995 10:20:15 +0100 Message-Id: <9512060920.AA11966@euax9i1c33.eua.ericsson.se> To: codesign@ifi.unizh.ch Subject: Re: Co-design course info? X-Sun-Charset: ISO-8859-1 Status: RO Reiner, Gaetano, All, I've held a half-day introduction to co-design, or rather CASHE, for undergraduates. Focus on organizational issues of getting any aid at all from computers. Interaction between IT support, Business, and Social issues in the engineer's workplace. Outline: 1. Complexity. Differentiation vs. integration. Commercial issue is maximum differentiation (e.g. customization and features, or HW/SW) without losing integration (no bugs, co-design). 2. Non-delivery of the promises of CAD. Article: J.K. Liker, M.Fleischer, D.Arnsdorf, "Fulfilling the Promises of CAD", Sloan Management Review, Spring 1992. 3. Social integration, Total Quality Management. Article: H.Takeuchi, I.Nonaka, "The new new product development game", Harward Business Review, January-February 1986. 4. Computers and Business. "Where is money to be made by codesign?" Article: N.Venkatraman, "IT-Enabled Business Transformation: From Automation to Business Scope Redefinition", Sloan Management Review, Winter 1994. 5. CASHE. Article: F.Östman, "Computer-Aided Software/Hardware Engineering -- an Overview", Proceedings of the EDA Day of Sveriges Verkstadsindustrier, Kista, Sweden, 1995. Also, don't forget the Rozenblit/Buchenrieder book, "Computer Aided Software/Hardware Engineering", IEEE Press, Piscataway, 1995! careful, ______ _~ (_/_ _ _ _/) _ . /) / ) , _/) _ __/ _/(_(/_(/__/(_/_/Z_ (_/_/)_/__/))_(I_/)_ Fredrik :Ostman Switch Lab, Ericsson Telecommunication Systems Laboratories Box 1505/Armborstv:agen 14, S-125 25 :ALVSJ:O, Stockholm, Sweden +46 (8) 727 3348, fax +46 (8) 749 0594, Fredrik.Ostman@eua.ericsson.se From codesign-request@ifi.unizh.ch Wed Dec 6 17:15:40 1995 Return-Path: Received: from chronos.synopsys.com by josef.ifi.unizh.ch with SMTP (PP) id <22621-0@josef.ifi.unizh.ch>; Wed, 6 Dec 1995 17:14:46 +0100 Received: from atropos.synopsys.com by chronos.synopsys.com with SMTP id AA00689 (5.65c/IDA-1.4.4 for ); Wed, 6 Dec 1995 08:14:08 -0800 Received: from clotho.synopsys.com (clotho.synopsys.com [146.225.100.24]) by atropos.synopsys.com (8.6.9/8.6.9) with ESMTP id IAA17714 for ; Wed, 6 Dec 1995 08:14:07 -0800 Received: from [146.225.116.88] (raulo-mac.synopsys.com [146.225.116.88]) by clotho.synopsys.com (8.6.9/8.6.9) with SMTP id IAA13948 for ; Wed, 6 Dec 1995 08:14:04 -0800 X-Sender: raul@macpo-1 Message-Id: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Date: Wed, 6 Dec 1995 08:16:40 -0800 To: codesign@ifi.unizh.ch From: raul@Synopsys.COM (Raul Camposano) Subject: Re: Co-design course info? Status: RO Hello, there is also the Journal "Design Automation for Embedded Systems" (Kluwer, I happen to be one of the editors, Wayne Wolf is the other). The first number is out, several of the articles give good overviews. --Raul >Subject: Co-design course info ___________________________________________________________________ Raul Camposano Synopsys Inc. Phone: +1 (415) 694-1769 700 East Middlefield Road Fax +1 (415) 694-4128 Mountain View, CA 94043-4033 email: raul@synopsys.com USA From codesign-request@ifi.unizh.ch Tue Dec 19 17:20:00 1995 Return-Path: Received: from ifimac32.ifi.unizh.ch by josef.ifi.unizh.ch with SMTP (PP) id <01592-0@josef.ifi.unizh.ch>; Tue, 19 Dec 1995 17:19:51 +0100 X-Sender: richter@josef.ifi.unizh.ch Message-Id: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Date: Tue, 19 Dec 1995 17:26:17 +0100 To: codesign@ifi.unizh.ch From: Thomas.Jell@zfe.siemens.de (Thomas Jell) (by way of richter@ifi.unizh.ch \(Lutz Richter\)) Subject: CUC 96 in Germany Status: RO PRELIMINARY ANNOUNCEMENT AND CALL FOR PAPERS ============================================== 1. C O M P O N E N T U S E R ' S C O N F E R E N C E ========================================================= Munich, Germany - July 15-19, 1996 The Conference will provide a forum for the presentation and exchange of current work on various topics in Componentware Technology including, but not limited to the following areas: Componentware Platforms and Services Methods for Component Design and Architecture Development Tools and Environments Componentware Languages Distributed Object Computing Formal Component Specifications Semantic Descriptions for Components Nonfunctional Requirements (realtime, fault tolerance, reliability, ...) for Components and Systems Patterns and Frameworks Compound Documents Interoperability Debugging and Testing Industrial Applications Integration of Legacy Systems The Conference will include two "ComponentWare Consortium" days where leading companies in that consortium present their work and solutions. Authors are invited to submit abstracts (1 or 2 pages) (4000-8000 characters in ASCII, WfW, Frame, PDF, RTF, PS) reflecting their current work, products or research results. The Program Committee reserves the right to accept a submission as a long, short, or poster presentation paper. All accepted papers will be published in the symposium proceedings / CDROM. Electronic mail submission (ASCII or postscript) is strongly recommended. Contact authors are requested to provide e-mail addresses. Please send all abstracts to jell@zfe.siemens.de Important Dates: ---------------- - Submission deadline is Feb-1. 96 - Authors will be notified of the acceptance/rejection by Feb-22. 96 At least one author of an accepted paper is expected to register for the Symposium and present the paper. Workshops or Tutorials ---------------------- If you wish to organize a full- or half-day workshop or give a tutorial on a specialized topic, to be held at the CUC96, please send the following information to the Workshops Chair: a detailed proposal, including workshop title, description of its scope and format, list of invited participants, and a summary vita of the workshop organizer(s). Workshop proposals are due Feb-12. 96 Authors will be notified of the acceptance/rejection by Feb-22. 96 Please send abstracts to Michael.Stal@zfe.siemens.de -------------------------------------------------------------------------- Program and General Chair Tom Jell, Siemens AG Tutorials and Workshops Chair Michael Stal, Siemens AG US Vice Chair: David Smyth, Jet Propulsion Labs, NASA Program Committee: Christian Ammon, Siemens Nixdorf Informationssysteme Sean Baker, IONA Technologies Prof. Ken Birman, Cornell University Dr. Walter Bischofberger, UBILAB Frank Buschmann, Siemens AG Brian K. Cottman, I-Kinetics Inc. Erich Gamma, IFA Unternehmensberatung Michael Klug, Siemens AG Prof. Pomberger, Universitaet Linz Prof. Doug Schmidt, University of Washington David Smyth, Jet Propulsion Labs, NASA Michael Stal, Siemens AG Publicity Chair: Michael Klug (Michael.Klug@zfe.siemens.de) Registration Chair: Peter Graubmann (Peter.Graubmann@zfe.siemens.de) Local Arrangements Chair: Robert Nahm (Robert.Nahm@zfe.siemens.de) From codesign-request@ifi.unizh.ch Fri Dec 22 12:24:26 1995 Return-Path: Received: from hades.polsl.gliwice.pl by josef.ifi.unizh.ch with SMTP (PP) id <03006-0@josef.ifi.unizh.ch>; Fri, 22 Dec 1995 12:24:03 +0100 Received: by hades.polsl.gliwice.pl (5.65/DEC-Ultrix/4.3) id AA01581; Fri, 22 Dec 1995 12:20:04 +0100 Received: from BOSS/MAILQUEUE by boss.iele.polsl.gliwice.pl (Mercury 1.21); 22 Dec 95 12:21:31 -0100 Received: from MAILQUEUE by BOSS (Mercury 1.21); 22 Dec 95 12:20:45 -0100 From: Wojciech Sakowski Organization: Institute of Electronics - Gliwice To: codesign@ifi.unizh.ch Date: Fri, 22 Dec 1995 12:20:36 CET Subject: Merry Christmas Priority: normal X-Mailer: Pegasus Mail v3.22 Message-Id: Status: RO Dear CoDesigners, I wish you all * *** <> _- * <> == <<>> == <<<>>> <<<<>>>> <<<<<>>>>> Merry Christmas and a Happy New Year !! <<<<<<>>>>>> ++ ++ ======== Wojtek Sakowski Silesian Technical University Gliwice, Poland From codesign-request@ifi.unizh.ch Wed Jan 3 10:32:51 1996 Return-Path: Received: from imag.imag.fr by josef.ifi.unizh.ch with SMTP (PP) id <23263-0@josef.ifi.unizh.ch>; Wed, 3 Jan 1996 09:53:26 +0100 Received: from verdon.imag.fr (verdon.imag.fr [147.171.129.20]) by imag.imag.fr (8.6.11/8.6.9) with ESMTP id JAA19752; Wed, 3 Jan 1996 09:52:29 +0100 Received: (from jerraya@localhost) by verdon.imag.fr (8.6.11/8.6.9) id JAA29174; Wed, 3 Jan 1996 09:53:28 +0100 Date: Wed, 3 Jan 1996 09:53:28 +0100 From: Ahmed Amine Jerraya Message-Id: <199601030853.JAA29174@verdon.imag.fr> X-Mailer: Mail User's Shell (7.2.5 10/14/92) To: isss-people@ics.UCI.EDU, codesign@ifi.unizh.ch Subject: 7th IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEMS PROTOTYPING Status: RO 7th IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEMS PROTOTYPING 19-21 June 1996 Porto Carras, Thessaloniki, GREECE CALL FOR PAPERS Hardware-Software Codesign and Codevelopment: Reducing System Introduction to Market The IEEE International Workshop on Rapid System Prototyping presents and explores the trends in rapid prototyping of Computer Based Systems including, but not limited to, communications, information, and manufacturing systems. The sixth annual workshop will focus on improved approaches to resolving prototyping issues and problems raised by incomplete specifications, increased system complexity and reduced time to market requirements for a multitude of products. The workshop will include a keynote presentation and formal paper sessions with a side range of system prototyping topics, which include, but are not limited to the following: - System Emulation - Prototyping case studies - Prototyping - Very large scale system engineering - Hardware-Software Codesign - Hardware/software tradeoffs - Tools for hardware prototyping - System verification/validation - Tools for software prototyping - Prototype to product transition - The role of FPGAs in system prototyping PAPER SUBMISSIONS ----------------- The program committee invites authors to submit five copies of an extended summary or a full paper (preferred) presenting original and unpublished work. Clearly describe the nature of the work, explain its significance, highlight its novel features, and state its current status. Authors of selected papers will be requested to prepare a manuscript for the workshop proceedings. Papers due: January 15, 1996 Notification of Acceptance: February 15, 1996 Final Camera Ready Manuscript due: March 15, 1996 SUBMIT ALL PAPERS TO: For General Information, Contact: A.A. Jerraya Nick Kanopoulos TIMA/INPG Data Communications Technologies 46 Avenue Fˇlix Viallet P.O. Box 12198 Grenoble 38100 3040 Cornwallis Road France Research Triangle Park, NC 27709 Tel: +33 76 57 47 59 Tel: (919) 541-7341 Fax: +33 76 47 38 14 Fax: (919) 541 6515 ahmed.jerraya@imag.fr rsp@rti.org Additional information on the RSP Workshop is available via WWW at http://www.ece.arizona.edu/conferences/rsp96 The IEEE Rapid Systems Prototyping Workshop is cosponsored by: IEEE Computer Society Technical Committees on: Design Automation , Simulation , Test Technology ORGANIZATION ------------ General Chair: N. Kanopoulos - DCT Program Chair: A.A. Jerraya - INPG/TIMA Publicity Chair: J.D. Carothers - Univ. of Arizona PROGRAM COMMITTEE ----------------- K. Anderson - Siemens T. Antonakopoulos - Univ. of Patras J. Arnold - IDA Supercomputing Research Center J. Beetem - MITRE S. Blionas - Intracom J-Y. Brunel - Philips V. Calandra - Zycad B. Candaele - Thomson-CSF B. Courtois - INPG/TIMA W. Debany - Rome Laboratory A. Dollas - Technical Univ. of Crete M. Engels - Katholieke Univ. Leuven P. Fiore - Lockheed M. Glesner - Technische Hochschule Darmstadt P. Henderson - Univ. of Southampton T. Hoshino - NTT P. Hulina - Penn. State Univ. F. Kordon - Univ. Paris IV, Lab MASI R. Lauwereins - Katholieke Univ. Leuven H.N. Nguyen - Bull S. Note - Philips ITCL V. Olive - France Telecom B. Rector - U.S. Dept. of Defense Y. Tanurhan - FZI C. Tong - Colorado St. Univ. S. Winkler - NIST N. Zervos - AT&T -- Best wishes and Happy new year 96 ------ Ahmed Amine JERRAYA, Ph. D | Office: (+33) 76 57 47 59 ------ System-Level Synthesis Group | Home : (+33) 76 87 61 74 ------ TIMA/INPG 46 Ave Felix Viallet | Fax : (+33) 76 47 38 14 ------ F-38031 Grenoble Cedex FRANCE | E_mail: ahmed.jerraya@imag.fr From codesign-request@ifi.unizh.ch Tue Jan 2 19:14:46 1996 Return-Path: Received: from 164.129.225.7 by josef.ifi.unizh.ch with SMTP (PP) id <27511-0@josef.ifi.unizh.ch>; Tue, 2 Jan 1996 18:54:36 +0100 Received: from by sgpgtw.sgp.st.com with SMTP (1.37.109.16/16.2) id AA291005207; Tue, 2 Jan 1996 18:53:27 +0100 From: PIERRE.PAULIN@st.com X-Openmail-Hops: 2 Date: Tue, 2 Jan 96 18:45:38 +0100 Message-Id: Subject: New Email address Mime-Version: 1.0 To: codesign@ifi.unizh.ch, isss-people@ics.uci.edu Content-Type: text/plain; charset=US-ASCII; name="New Email address" Content-Transfer-Encoding: 7bit Status: RO To all Codesign and System Synthesis people, Another year, another email address: pierre.paulin@st.com (note the 'st.com' and not the old 'stm.com') My New Year's resolution is to keep this one until at least 1997 ... Thank you for your understanding. With my best wishes, Pierre P.S. My old email (paulinp@stm.com) will continue to work and can be used as a backup in case of delivery problems. _____________________________________________________________________ | Pierre G. Paulin, Manager | Embedded Systems Technology | | Email: pierre.paulin@st.com | SGS-Thomson Microelectronics | | (or paulinp@stm.com) | 850, rue Jean-Monnet | | Phone (office): +33 76 92 65 29 | BP 16 - 38921 Crolles cedex | | Fax (office): +33 76 92 64 44 | France | ---------------------------------------------------------------------